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Computer tech blog

Started by Dr. Mario, March 11, 2009, 05:28:30 pm

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Smokey

Fav MoBO? wow i wish i could say that...(well technically i can since i also have my laptop ^_^)...

Makes me wonder btw what makes those ATC radar systems tick?
I dont tell you how to tell me what to do, so dont tell me how to do what you tell me to do... Bender the Great) :/
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Dr. Mario

Okay, here goes: First, the RADAR (digital verison, the one that's entirely fool-proof) shoots out pre-determined pulses of Microwave radiation - scattered all over the area being systematically scanned. Second, a special sensor (or you could say, multiple sensors in one multi-directional module) receive the first ping, then is set aside, as a reference for the FPU, and keep collecting multiple pings, storing all data onto RAM.

Added after 12 minutes:

Third, the CPU start to pull the pinging data, similar to Etherent pinging, then bring up the reference point data, then have its on-die FPU calculate every stopwatch codes, and put FFT formulas out to paint 3D RADAR image, sending remaining fully-digested chunk of data to next processor, GPU.
Fourth and the last, GPU perform a special mathematic formulation (You bet your sweet ass it's nearly the same as what's done by Crysis.) to take distance and shape into account of RADAR imaging. There ya go!
;025 Now, Bowser... What can I do with you...

Smokey

Well, a little more elaborate that i imagined... and quite useful too... ^_^
Eehm, well leaves me to thank you... Thanks... :D
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Dr. Mario

Okay, back to "favorite motherboard"
Why is it my favorite? It's easy to deploy any boot software onto 16MB serial BIOS firmware flash chip. It also have both internal and external JTAG port, that is, I can choose to probe it or have it do itself, very useful for debugging. And it have eight XDIMM slots, that I can keep adding more larger XDR memory modules. Hmm, I like big memory capacity!
;025 Now, Bowser... What can I do with you...

Smokey

O_O 8 Dimm Slots?! Oh sweet, i usually only see that on dual socket boards...
I dont tell you how to tell me what to do, so dont tell me how to do what you tell me to do... Bender the Great) :/
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Dr. Mario

Yeah, and the CPU in the future might have native quad channel memory controller, in this case, four XMC blocks, that is, four XIO controllers.

And, having 8 DIMM will do us good, because we can just add the memory modules as large as we want.
;025 Now, Bowser... What can I do with you...

Smokey

Hmmmm, delicious RAM...
I always drool away when i see those MoBos with lot's of RAM slots...
Imagine, 16 slots with a 4GB XDR Dimm in each one, coupled with a nice Phenom X4 Black edition... ;028
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Dr. Mario

O_O That will have sustained bandwidth on Dual Channel XIO, on either Phenom II X4 or X6 Black, 600 to 950 GB/s, that is, 8 XDR DRAM modules on individual XIO, for 16 XDIMM all filled, Xeon Dunnington will stand no chance, pitting against this AMD CPU...

That's LIKE pitting BB gun against a sawed-off rifle?!
;025 Now, Bowser... What can I do with you...

Smokey

Only example i can think of with extreme bandwith bottlenecking is a game of C&C TibSun i once played over a 10Mbit ethernet hub... Blew the entire network away... :D
I dont tell you how to tell me what to do, so dont tell me how to do what you tell me to do... Bender the Great) :/
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Dr. Mario

The same is true of multicore CPU's FSB (both memory and HyperTransport/QuickAssist) - to make the best of it, sometimes, is to break the throughput, in a same manner you would want to tame a p*ssed-off mule. At least AMD made the best use of what's available for their Hammer RISC-based CPUs.
;025 Now, Bowser... What can I do with you...

Smokey

right, because that was the second thing i thought of when i thought of multicore/oversized core CPUs (that was years ago when multi-core was still unheard of, but probably in full development ), is the limited number of pins a die supports...
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Dr. Mario

Sure, die can handle having a lot of pinouts, but the bonding wires actually have physical limit, the size is a problem: We cannot shrink the diameter of Copper/Gold wire without snapping it as easily.

So, we would want to try and avoid this kind of problem, is to put memory controller and host Northbridge circuitry, to reduce the number of pins on die as much as we can.
But the bonus is, we will have pretty fast data traffic around CPU core and outside it, thank to serial circuitry design.
;025 Now, Bowser... What can I do with you...

NejinOniwa

QuoteWe cannot shrink the diameter of Copper/Gold wire without snapping it as easily.

That's why we need to start using Carbon Nanotube technology already. -w-
YOU COULD HAVE PREVENTED THIS

Smokey

eehm, if that were to be used now in commercial models, we'd be paying the same for a CPU as we did back then for a 386... some 3 to 4 thousand dollars...

Let them figure out an effective way of producing that first....
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Dr. Mario

Sorry to bring it up, but Carbon Nanotube is naturally a resistor by nature, because Carbon is next to worst conductor - unless it's made with Copper lattice. Copper is #1 the best conductor.
;025 Now, Bowser... What can I do with you...